On Wed, Mar 25, 2015 at 12:26 PM, Leo Yan <leo.yan@linaro.org> wrote:

When load mcu binary, need map the sram region so that can copy mcu
binary into the sram.

And currently BL30 binary has not been used by hikey platform, so
can use BL30 to store mcu binary. Add the BL30 info in the io storage
structure.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
plat/hikey/aarch64/hikey_common.c | 6 ++++++
plat/hikey/bl2_plat_setup.c | 40 +++++++++++++++++++++++++++++++++++++++
plat/hikey/hikey_def.h | 3 +++
plat/hikey/include/platform_def.h | 8 +++++++-
plat/hikey/plat_io_storage.c | 10 ++++++++++
5 files changed, 66 insertions(+), 1 deletion(-)

diff --git a/plat/hikey/aarch64/hikey_common.c b/plat/hikey/aarch64/hikey_common.c
index d90ab9e..055dde8 100644
--- a/plat/hikey/aarch64/hikey_common.c
+++ b/plat/hikey/aarch64/hikey_common.c
@@ -52,6 +52,10 @@
0x1000, \
MT_DEVICE | MT_RW | MT_NS)

+#define MAP_SRAM MAP_REGION_FLAT(SRAM_BASE, \
+ SRAM_SIZE, \
+ MT_DEVICE | MT_RW | MT_SECURE)
+
/*
* Table of regions for different BL stages to map using the MMU.
* This doesn't include Trusted RAM as the 'mem_layout' argument passed to
@@ -62,6 +66,7 @@ static const mmap_region_t hikey_mmap[] = {
MAP_DEVICE,
MAP_NS_DRAM,
MAP_ROM_PARAM,
+ MAP_SRAM,
{0}
};
#endif
@@ -69,6 +74,7 @@ static const mmap_region_t hikey_mmap[] = {
static const mmap_region_t hikey_mmap[] = {
MAP_DEVICE,
MAP_NS_DRAM,
+ MAP_SRAM,
{0}
};
#endif
diff --git a/plat/hikey/bl2_plat_setup.c b/plat/hikey/bl2_plat_setup.c
index 7055504..631a3bf 100644
--- a/plat/hikey/bl2_plat_setup.c
+++ b/plat/hikey/bl2_plat_setup.c
@@ -38,6 +38,8 @@
#include <platform.h>
#include <platform_def.h>
#include <string.h>
+#include <mmio.h>
+#include <hi6220.h>
#include "hikey_def.h"
#include "hikey_private.h"

@@ -190,6 +192,10 @@ void bl2_plat_arch_setup(void)
******************************************************************************/
void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo)
{
+ bl30_meminfo->total_base = 0x01000000;
+ bl30_meminfo->total_size = 0x01000000;
+ bl30_meminfo->free_base = 0x01000000;
+ bl30_meminfo->free_size = 0x01000000;
}

Based on comment below, is this 0x01000000 or 0xf9898000?

/*******************************************************************************
@@ -198,6 +204,40 @@ void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo)
******************************************************************************/
int bl2_plat_handle_bl30(image_info_t *bl30_image_info)
{
+ int *buf = (int *)bl30_image_info->image_base;
+
+ INFO("%s: [%x] %x %x %x %x\n",
+ __func__, buf, buf[0], buf[1], buf[2], buf[3]);
+
+ buf += 50;
+ INFO("%s: [%x] %x %x %x %x\n",
+ __func__, buf, buf[0], buf[1], buf[2], buf[3]);
+
+ buf += 50;
+ INFO("%s: [%x] %x %x %x %x\n",
+ __func__, buf, buf[0], buf[1], buf[2], buf[3]);
+
+ buf = (int *)(bl30_image_info->image_base +
+ bl30_image_info->image_size);
+ buf -= 4;
+ INFO("%s: [%x] %x %x %x %x\n",
+ __func__, buf, buf[0], buf[1], buf[2], buf[3]);
+
+ /* enable mcu sram */
+ hisi_mcu_enable_sram();
+
+ /* load mcu binary to sram */
+ hisi_mcu_load_image(bl30_image_info->image_base,
+ bl30_image_info->image_size);
+
+ /* let mcu to run */
+ hisi_mcu_start_run();
+
+ INFO("%s: mcu pc is %x\n",
+ __func__, mmio_read_32(AO_SC_MCU_SUBSYS_STAT2));
+
+ INFO("%s: AO_SC_PERIPH_CLKSTAT4 is %x\n",
+ __func__, mmio_read_32(AO_SC_PERIPH_CLKSTAT4));
return 0;
}

diff --git a/plat/hikey/hikey_def.h b/plat/hikey/hikey_def.h
index b26af68..fc5901e 100644
--- a/plat/hikey/hikey_def.h
+++ b/plat/hikey/hikey_def.h
@@ -42,6 +42,9 @@
#define XG2RAM0_BASE 0xF9800000
#define XG2RAM0_SIZE 0x00400000

+#define SRAM_BASE 0xFFF80000
+#define SRAM_SIZE 0x00012000
+
/*
* DRAM at 0x0000_0000 is divided in two regions:
* - Secure DRAM (default is the top 16MB except for the last 2MB, which are
diff --git a/plat/hikey/include/platform_def.h b/plat/hikey/include/platform_def.h
index e8f16b7..46a2fcd 100644
--- a/plat/hikey/include/platform_def.h
+++ b/plat/hikey/include/platform_def.h
@@ -132,6 +132,12 @@
#define BL31_LIMIT (BL31_BASE + 0x40000)

/*******************************************************************************
+ * BL3-1 specific defines.
+ ******************************************************************************/
+#define BL30_BASE (0x01000000) /* 0xf989_8000 */

The comment is confusing. Is this 0x01000000 or 0xf9898000?

+#define BL30_LIMIT (0x01000000 + 0x40000)
+
+/*******************************************************************************
* Load address of BL3-3 in the HiKey port
******************************************************************************/
#define NS_IMAGE_OFFSET (DRAM_BASE + 0x37000000) /* 880MB */
@@ -142,7 +148,7 @@
#define ADDR_SPACE_SIZE (1ull << 32)

#if IMAGE_BL1 || IMAGE_BL2 || IMAGE_BL31
-# define MAX_XLAT_TABLES 3
+# define MAX_XLAT_TABLES 4
#endif

#define MAX_MMAP_REGIONS 16
diff --git a/plat/hikey/plat_io_storage.c b/plat/hikey/plat_io_storage.c
index 98f5845..59d4725 100644
--- a/plat/hikey/plat_io_storage.c
+++ b/plat/hikey/plat_io_storage.c
@@ -95,6 +95,11 @@ static const io_file_spec_t bl2_file_spec = {
.mode = FOPEN_MODE_RB
};

+static const io_file_spec_t bl30_file_spec = {
+ .path = BL30_IMAGE_NAME,
+ .mode = FOPEN_MODE_RB
+};
+
static const io_file_spec_t bl31_file_spec = {
.path = BL31_IMAGE_NAME,
.mode = FOPEN_MODE_RB
@@ -144,6 +149,11 @@ static const struct plat_io_policy policies[] = {
(uintptr_t)&bl2_file_spec,
open_fip
}, {
+ BL30_IMAGE_NAME,
+ &fip_dev_handle,
+ (uintptr_t)&bl30_file_spec,
+ open_fip
+ }, {
BL31_IMAGE_NAME,
&fip_dev_handle,
(uintptr_t)&bl31_file_spec,
--
1.9.1

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