Dev August 2015

dev@lists.96boards.org

9 participants
6 discussions

UART adapter documentation and design files

by Grant Likely

For those of you who have a 96Boards UART adapter board (Sonic Screwdriver), I've written a user guide and the design files are available on the Linaro git tree. https://docs.google.com/document/d/1x3g4mfZJ2GxHCUYXp_O-ShwlbhJE2bMRtjcyRPF… https://git.linaro.org/people/grant.likely/96boards-uart.git g.

9 years, 1 month

HiKey U-Boot port

by Peter Griffin

Hi folks, For fun I've done a minimal U-Boot port for the HiKey board, I thought I'd post it here in case anyone else is interested. This work is based on top of Linus Walleij Juno port. The code can be found here: - ssh://git@git.linaro.org:/people/peter.griffin/u-boot Currently the port supports: - 1) Serial 2) eMMC (although only basic read testing) 3) USB (ASIX usb networking works, no mass storage) 4) GPIO So you have ATF -> u-boot -> kernel / your_own_rtos The main "useful" thing I suppose is the ability to quickly tftp kernels etc into DDR over the network. Obviously the ability to toggle the LEDs in u-boot is also something to amuse yourself with. Pre-built binaries can be found here: - http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/ NB: These are built with the latest PSCI enabled ATF, so you also need to use the corresponding PSCI enabled kernel to get all 8 cores. The readme on how to replicate everything from source can be found here: - http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/u-boo… . Any patches please send them along to me, one obvious missing feature is sdhci support. That doesn't look very hard to get going, as long as we can get the IP clocked and out of reset (and would be significantly easier if the published datasheet documented the registers...). Have Fun! regards, Peter. p.s. serial trace below debug EMMC boot: print init OK debug EMMC boot: send RST_N . debug EMMC boot: start eMMC boot...... load fastboot1! Switch to aarch64 mode. CPU0 executes at 0xf9801000! NOTICE: Booting Trusted Firmware NOTICE: BL1: v1.1(release):9a97502 NOTICE: BL1: Built : 08:13:36, Mar 10 2015 NOTICE: succeed to init lpddr3 rank0 dram phy INFO: lpddr3_freq_init, set ddrc 533mhz INFO: init ddr3 rank0 in 533MHz INFO: ddr3 rank1 init pass in 533MHz INFO: Elpida DDR NOTICE: BL1: Booting BL2 NOTICE: BL2: v1.1(debug):9a97502 NOTICE: BL2: Built : 10:22:35, Mar 17 2015 INFO: BL2: Loading BL3-1 INFO: Using FIP INFO: Loading file 'bl31.bin' at address 0xf9858000 INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf985f010 INFO: BL2: Loading BL3-3 INFO: Using FIP INFO: Loading file 'bl33.bin' at address 0x37000000 INFO: File 'bl33.bin' loaded: 0x37000000 - 0x3703db38 NOTICE: BL1: Booting BL3-1 NOTICE: BL3-1: v1.1(debug):9a97502 NOTICE: BL3-1: Built : 10:22:38, Mar 17 2015 INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address = 0x37000000 INFO: BL3-1: Next image spsr = 0x3c9 U-Boot 2015.04-rc1-00010-g49ec0dd (Mar 17 2015 - 10:11:00) hikey_aemv8a DRAM: 1 GiB MMC: HiKey DWMMC: 0 Using default environment In: serial Out: serial Err: serial Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 HiKey64# usb start starting USB... USB0: Core Release: 3.00a scanning bus 0 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found scanning usb for ethernet devices... Warning: asx0 using MAC address from net device 1 Ethernet Device(s) found HiKey64# HiKey64# setenv ipaddr 192.168.0.200 HiKey64# HiKey64# setenv serverip 192.168.0.10 HiKey64# HiKey64# tftpboot 0x10000000 Image Using asx0 device TFTP from server 192.168.0.10; our IP address is 192.168.0.200 Filename 'Image'. Load address: 0x10000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ######################################################T ########### ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ############################################## 238.3 KiB/s done Bytes transferred = 12214232 (ba5fd8 hex) HiKey64# tftpboot 0x13000000 hi6220-hikey.dtb Using asx0 device TFTP from server 192.168.0.10; our IP address is 192.168.0.200 Filename 'hi6220-hikey.dtb'. Load address: 0x13000000 Loading: ################# 237.3 KiB/s done Bytes transferred = 85319 (14d47 hex) HiKey64# ï¿½ooti 0x10000000 - 0x13000000 Unknown command 'ï¿½ooti' - try 'help' HiKey64# Unknown command 'ï¿½ooti' - try 'help' HiKey64# booti 0x10000000 - 0x13000000 ## Flattened Device Tree blob at 13000000 Booting using the fdt blob at 0x13000000 Using Device Tree in place at 0000000013000000, end 0000000013017d46 Starting kernel ... [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 3.18.0+ (griffinp@griffinp-ThinkPad-X1-Carbon-2nd) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #5 SMP PREEMPT Tue Mar 17 08:21:27 GMT 2015 [ 0.000000] CPU: AArch64 Processor [410fd033] revision 3 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: UEFI not found. [ 0.000000] cma: Reserved 16 MiB at 0x000000003f000000 [ 0.000000] On node 0 totalpages: 262144 [ 0.000000] DMA zone: 3584 pages used for memmap [ 0.000000] DMA zone: 0 pages reserved [ 0.000000] DMA zone: 262144 pages, LIFO batch:31 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] PERCPU: Embedded 14 pages/cpu @ffffffc03eefc000 s18688 r8192 d30464 u57344 [ 0.000000] pcpu-alloc: s18688 r8192 d30464 u57344 alloc=14*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 258560 [ 0.000000] Kernel command line: console=ttyAMA0,115200n8 root=/dev/sda1 rw earlyprintk=pl011,0x7ff80000 debug user_debug=31 loglevel=9 [ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes [ 0.000000] log_buf_len total cpu_extra contributions: 28672 bytes [ 0.000000] log_buf_len min size: 16384 bytes [ 0.000000] log_buf_len: 65536 bytes [ 0.000000] early log buf free: 14752(90%) [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) [ 0.000000] Memory: 994464K/1048576K available (7777K kernel code, 651K rwdata, 3116K rodata, 376K init, 492K bss, 54112K reserved) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vmalloc : 0xffffff8000000000 - 0xffffffbdffff0000 ( 247 GB) [ 0.000000] vmemmap : 0xffffffbe00000000 - 0xffffffbfc0000000 ( 7 GB maximum) [ 0.000000] 0xffffffbe00000000 - 0xffffffbe00e00000 ( 14 MB actual) [ 0.000000] PCI I/O : 0xffffffbffa000000 - 0xffffffbffb000000 ( 16 MB) [ 0.000000] fixed : 0xffffffbffbdfe000 - 0xffffffbffbdff000 ( 4 KB) [ 0.000000] modules : 0xffffffbffc000000 - 0xffffffc000000000 ( 64 MB) [ 0.000000] memory : 0xffffffc000000000 - 0xffffffc040000000 ( 1024 MB) [ 0.000000] .init : 0xffffffc000b25000 - 0xffffffc000b83000 ( 376 KB) [ 0.000000] .text : 0xffffffc000080000 - 0xffffffc000b24564 ( 10898 KB) [ 0.000000] .data : 0xffffffc000b83000 - 0xffffffc000c25fd8 ( 652 KB) [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 [ 0.000000] NR_IRQS:64 nr_irqs:64 16 [ 0.000000] hisi_clk_register_stub: base=0xffffff8000002af4, comm_base=0xffffff8000008000 [ 0.000000] hisi_clk_init: base ffffff800000a000 [ 0.000000] hisi_clk_init: base ffffff800000c000 [ 0.000000] hisi_clk_init: base ffffff800000e000 [ 0.000000] hisi_clk_init: base ffffff8000010000 [ 0.000000] Architected cp15 timer(s) running at 1.20MHz (phys). [ 0.000005] sched_clock: 56 bits at 1200kHz, resolution 833ns, wraps every 3579139414016ns [ 0.000422] Console: colour dummy device 80x25 [ 0.001558] allocated 4194304 bytes of page_cgroup [ 0.001562] please try 'cgroup_disable=memory' option if you don't want memory cgroups [ 0.001575] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.40 BogoMIPS (lpj=12000) [ 0.001584] pid_max: default: 32768 minimum: 301 [ 0.001694] Security Framework initialized [ 0.001710] SELinux: Initializing. [ 0.001737] SELinux: Starting in permissive mode [ 0.001787] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) [ 0.001794] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) [ 0.002309] Initializing cgroup subsys memory [ 0.002333] Initializing cgroup subsys freezer [ 0.002343] Initializing cgroup subsys hugetlb [ 0.002352] Initializing cgroup subsys debug [ 0.004190] /cpus/cpu@0: Missing clock-frequency property [ 0.004230] /cpus/cpu@1: Missing clock-frequency property [ 0.004269] /cpus/cpu@2: Missing clock-frequency property [ 0.004309] /cpus/cpu@3: Missing clock-frequency property [ 0.004350] /cpus/cpu@4: Missing clock-frequency property [ 0.004393] /cpus/cpu@5: Missing clock-frequency property [ 0.004437] /cpus/cpu@6: Missing clock-frequency property [ 0.004481] /cpus/cpu@7: Missing clock-frequency property [ 0.004517] hw perfevents: enabled with arm/armv8-pmuv3 PMU driver, 7 counters available [ 0.004545] EFI services will not be available. [ 0.079936] CPU1: Booted secondary processor [ 0.079944] Detected VIPT I-cache on CPU1 [ 0.099879] CPU2: Booted secondary processor [ 0.099882] Detected VIPT I-cache on CPU2 [ 0.119886] CPU3: Booted secondary processor [ 0.119889] Detected VIPT I-cache on CPU3 [ 0.139922] CPU4: Booted secondary processor [ 0.139929] Detected VIPT I-cache on CPU4 [ 0.159920] CPU5: Booted secondary processor [ 0.159924] Detected VIPT I-cache on CPU5 [ 0.179929] CPU6: Booted secondary processor [ 0.179932] Detected VIPT I-cache on CPU6 [ 0.199941] CPU7: Booted secondary processor [ 0.199944] Detected VIPT I-cache on CPU7 [ 0.200014] Brought up 8 CPUs [ 0.200049] SMP: Total of 8 processors activated. [ 0.200626] devtmpfs: initialized [ 0.204994] xor: measuring software checksum speed [ 0.299605] 8regs : 2381.600 MB/sec [ 0.399639] 8regs_prefetch: 2176.000 MB/sec [ 0.499674] 32regs : 2639.200 MB/sec [ 0.599708] 32regs_prefetch: 2321.600 MB/sec [ 0.599714] xor: using function: 32regs (2639.200 MB/sec) <snip>

9 years, 2 months

When is the dragonboard 410c going to be 96boards compliant?

by Thomas B. Rücker

Hi, Just what it says in the Subject: When is the dragonboard 410c going to be 96boards CE compliant? Just /one/ example: Schematics are still not available, although mandated by compliance spec. Has anyone seen the compliance report of the board and could shed some light on all those issues? I'd like to see it, if possible. Thanks! Thomas

9 years, 3 months

HiKey boot issue with recent 96boards/edk2

by Jerome Forissier

Hi, I need some help with EDK2 on HiKey (1). After updating my hikey_optee project (2) with the latest 96boards/edk2 (3), I can't boot anymore. Is Grub now required to boot Linux? It seems that boot menu entries are hardcoded in (4), or am I missing something?. I could not really tell by reviewing the commit logs. Well in any case I'm getting the following menu: ~~~~~~~~ Fail to start BootNext. The default boot selection will start in 1 seconds [1] fastboot [2] grub on eMMC [3] grub on SD [4] Shell [5] Boot Manager Start: ~~~~~~~~ Entries 1-3 seem to do nothing, and just return to the same menu. Prior to this, EDK2 would boot Linux immediately as en EFI application, thanks to some entries in HiKey.dsc (5), which now seems to be ignored (are they really? similar entries are still present in 96boards/hikey which tends to indicate they're not obsolete). What should I do to boot my kernel? I'd rather avoid adding Grub to the boot sequence, which is already complex enough IMHO, but I can of course do that if it is the recommended architecture. Now, if I could simply adjust my HiKey.dsc, that would be great... (1) https://github.com/96boards/edk2 (2) https://github.com/linaro-swg/hikey_optee (3) https://github.com/96boards/edk2/commits/4984b34 (4) https://github.com/96boards/edk2/blob/de234273/HisiPkg/HiKeyPkg/Drivers/HiK… (5) https://github.com/linaro-swg/edk2/blob/1690ce6/HisiPkg/HiKeyPkg/HiKey.dsc#… Thanks, -- Jerome

9 years, 4 months

HiKey and OpenOCD

by Peter Griffin

Hi folks, For anyone who is interested there is a open source OpenOCD / GDB WIP debug solution available for HiKey. I've created a wiki page here https://github.com/96boards/documentation/wiki/JTAG-on-HiKey Which documents the hardware setup, where you can get the code, and a overview of what is currently working. Thanks to Philip Attfield who has already provided some patches to overcome several issues I was facing with read_memory and GDB config. Please feel free to update the wiki page with any additional info you find out (thanks to Dan Thompson for already doing this), and patches making OpenOCD support for HiKey even better are most welcome :) regards, Peter.

9 years, 4 months

What is the definition of "compliance" as governed by 96Boards/LINARO?

by "Thomas B. Rücker"

The 96boards project promises to bring standards, order and decorum to an otherwise fragmented and mutually incompatible world of development boards, be it for "consumer edition" or "enterprise edition" electronics. This is a laudable goal. It also promises "Makers" standardized interfaces, electrically and mechanically to build things around those boards. For anyone who tried to use an extension board from one board with another before, this will be close to promised land. To maintain order, one needs to maintain authority. In the world of 96 Borads this comes in the form of "compliance". Much thought was apparently spent by great minds on building up a system of compliance definitions, specifications and requirements. Both for Hardware and Software they covered a lot of bases. [1][2][3] They also recognized the needs of protecting the intellectual design property of board manufacturers and decided against mandating full documentation that would allow one to directly modify and produce an own board, based on a certified 96 board. The great goal is, that by the end of 2015 we shall see 96 boards available and compliant with 96 Boards. Oh what a hootenanny that will be! So far we've seen two CE boards reach availability on the market. Some CE boards and an EE boards are in various stages of publicity. It is logical to assume that not only will those companies with announced boards, but also those who are going to announce and bring the remaining 90 boards to market, will turn not only to the aforementioned compliance documentation, but they will also closely examine the two boards that have already received the prestigious 96 Borads certification. For those two Boards must be shining examples, pioneering these waters with the expert help of Navigators who drew the compliance maps of the 96 Boards world and provided exact steps. … That is where I become sad, because I fail to resolve the dissonance between reality and the maps of the world, vulgo the compliance spec. Bear with me while I explain. I recently found myself trying to understand how the GPS in the Dragonboard 410c that I recently bought, to gain some AArch64 experience, is wired to the APQ8016 SoC. Someone had asked me if it would be possible to get NMEA from it, and I thought, well that's going to be easy to find out, after all it's a 96 Board compliant product, as it prominently features on their page. I turned to the 96boards.org page for the 410c [4], as there I would find the necessary documentation. You won't be able to imagine my surprise, when I reached the page and where the hyperlink to the schematics should be stands this text: "The DragonBoard 410c Schematics/BOM (Coming soon)" I then looked at the Hardware Manual [5], trying to keep my hopes up, grasping for the last straw. Well it told me something about "SSBI + IQ", that was something, although I'm still not sure what this actually means. The "Qualcomm ® Snapdragon TM 410 Processor (APQ8016) - Device Specification", linked from [4] mentions it as a "Single-wire SBI", where SBI is apparently some kind of "Serial bus interface". But in which way it is _actually_ wired up, we possibly might never find out. This led me to another train of thought. I hopped on and crossed the land of 96 Boards to arrive back at the compliance page [1]. For it states: "An SoC technical reference manual *shall* be available This *shall* include sufficient information for developers to be able to create board drivers and software interfaces for the supported SoC features." (emphasis from [1]) This confuses me even more, as I can't find from the linked documentation in [4] anything that would cover information necessary to "create board drivers" for the WGR640 GNSS (GPS) chip on the 410c board. Also there *shall* be a open source boot loader. Maybe I've embarked on too many optical experiments, but I can't see the Aboot source for the Ubuntu builds[6] I didn't bother looking at the HiKey board and how it fares in comparison. It's made out of the usual unobtainium as previous animal boards and will probably only ship in homeopathic doses for the next few months. That makes it rather uninteresting and unlikely to acquire a significant community, certainly not going to usurp the RPi throne. Personally this leaves me seeing "Mene, Mene, Tekel, Upharsin." written on the wall, for 96 Boards thou art weighed and thou art found wanting. Of course I might be wrong, maybe the RFC 2119 style language found in [1][2][3] uses different definitions of terms like SHALL, maybe it doesn't mean MUST, but "should, maybe, at some point"? Then I guess everything could be just A-OK and all the remaining boards will all start shipping by the end of the year. What this would mean in relation to the initially stated goals, I'm not sure. I guess it's compliant, depending on your definition of compliant. Thomas 1: https://www.96boards.org/about/compliance/ 2: http://www.96boards.org/ce-specification 3: http://www.96boards.org/ee-specification 4: https://www.96boards.org/products/ce/dragonboard410c/ 5: https://github.com/96boards/documentation/raw/master/dragonboard410c/Hardwa… 6: http://builds.96boards.org/releases/dragonboard410c/linaro/ubuntu/latest/

9 years, 4 months

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Dev August 2015