Bisected to this commit:
commit af016d94f7e50ffd4ca0fe93a22cb07c06f4c4bf (HEAD, refs/bisect/bad) Author: Leo Yan leo.yan@linaro.org Date: Thu Mar 12 10:23:48 2015 +0800
arm64: dts: enable psci in hikey
Enable psci in Hisilicon Hi6220 HiKey board.
Signed-off-by: Haojian Zhuang haojian.zhuang@linaro.org Signed-off-by: Leo Yan leo.yan@linaro.org
diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi index d3428f4..e15c862 100644 --- a/arch/arm64/boot/dts/hi6220.dtsi +++ b/arch/arm64/boot/dts/hi6220.dtsi @@ -9,6 +9,11 @@ #include <dt-bindings/pinctrl/hisi.h>
/ { + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + cpus { #address-cells = <2>; #size-cells = <0>; @@ -17,8 +22,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; + enable-method = "psci"; clocks = <&clock_acpu HI6220_STUB_ACPU0>; clock-names = "acpu0"; clock-latency = <0>; @@ -36,57 +40,44 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu4: cpu@4 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; + enable-method = "psci"; clock-latency = <0>; }; cpu5: cpu@5 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu6: cpu@6 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; }; cpu7: cpu@7 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x740fff8>; - clock-latency = <0>; + enable-method = "psci"; };
cpu-map { @@ -211,7 +202,6 @@ <1 14 0xff08>, <1 11 0xff08>, <1 10 0xff08>; - clock-frequency = <1200000>; };
reboot {
Hi Lee
Have you updated the firmware beyond the July 2015 version you mentioned in another post?
IIRC PSCI was not enabled in the Hikey firmware until mid-August.
Daniel.
On 05/10/15 10:35, Lee Jones wrote:
Bisected to this commit:
commit af016d94f7e50ffd4ca0fe93a22cb07c06f4c4bf (HEAD, refs/bisect/bad) Author: Leo Yan leo.yan@linaro.org Date: Thu Mar 12 10:23:48 2015 +0800
arm64: dts: enable psci in hikey Enable psci in Hisilicon Hi6220 HiKey board. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi index d3428f4..e15c862 100644 --- a/arch/arm64/boot/dts/hi6220.dtsi +++ b/arch/arm64/boot/dts/hi6220.dtsi @@ -9,6 +9,11 @@ #include <dt-bindings/pinctrl/hisi.h>
/ {
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
- cpus { #address-cells = <2>; #size-cells = <0>;
@@ -17,8 +22,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>;
enable-method = "spin-table";cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clocks = <&clock_acpu HI6220_STUB_ACPU0>; clock-names = "acpu0"; clock-latency = <0>;
@@ -36,57 +40,44 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu4: cpu@4 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clock-latency = <0>; }; cpu5: cpu@5 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu6: cpu@6 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu7: cpu@7 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
enable-method = "psci"; };
cpu-map {
@@ -211,7 +202,6 @@ <1 14 0xff08>, <1 11 0xff08>, <1 10 0xff08>;
clock-frequency = <1200000>; };
reboot {
On 5 October 2015 at 10:43, Daniel Thompson daniel.thompson@linaro.org wrote:
Have you updated the firmware beyond the July 2015 version you mentioned in another post?
IIRC PSCI was not enabled in the Hikey firmware until mid-August.
The latest firmware from the releases site is installed. An update is required by the sounds of it.
Am I correct in thinking that I need to flash UEFI/ATF/etc and is [0] the correct HOWTO to follow to successfully boot most recent kernel?
[0] https://github.com/96boards/documentation/wiki/HiKeyUEFI
On 05/10/15 10:35, Lee Jones wrote:
Bisected to this commit:
commit af016d94f7e50ffd4ca0fe93a22cb07c06f4c4bf (HEAD, refs/bisect/bad) Author: Leo Yan leo.yan@linaro.org Date: Thu Mar 12 10:23:48 2015 +0800
arm64: dts: enable psci in hikey Enable psci in Hisilicon Hi6220 HiKey board. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi index d3428f4..e15c862 100644 --- a/arch/arm64/boot/dts/hi6220.dtsi +++ b/arch/arm64/boot/dts/hi6220.dtsi @@ -9,6 +9,11 @@ #include <dt-bindings/pinctrl/hisi.h>
/ {
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
- cpus { #address-cells = <2>; #size-cells = <0>;
@@ -17,8 +22,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>;
enable-method = "spin-table";cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clocks = <&clock_acpu HI6220_STUB_ACPU0>; clock-names = "acpu0"; clock-latency = <0>;
@@ -36,57 +40,44 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu4: cpu@4 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clock-latency = <0>; }; cpu5: cpu@5 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu6: cpu@6 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu7: cpu@7 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
enable-method = "psci"; };
cpu-map {
@@ -211,7 +202,6 @@ <1 14 0xff08>, <1 11 0xff08>, <1 10 0xff08>;
clock-frequency = <1200000>; };
reboot {
Dev mailing list Dev@lists.96boards.org https://lists.96boards.org/mailman/listinfo/dev
On 05/10/15 11:15, Lee Jones wrote:
On 5 October 2015 at 10:43, Daniel Thompson daniel.thompson@linaro.org wrote:
Have you updated the firmware beyond the July 2015 version you mentioned in another post?
IIRC PSCI was not enabled in the Hikey firmware until mid-August.
The latest firmware from the releases site is installed. An update is required by the sounds of it.
Am I correct in thinking that I need to flash UEFI/ATF/etc and is [0] the correct HOWTO to follow to successfully boot most recent kernel?
[0] https://github.com/96boards/documentation/wiki/HiKeyUEFI
Yes. I use scripts to update but my scripts were derived from that document.
Daniel.
Hi, Lee
That's not a bug. We made it for purpose. See this: ( https://github.com/96boards/documentation/wiki/LatestSnapshots)
1.
e) fastboot bootloader officially deprecated (device tree requires PSCI).
1. Snapshot release information
1.
Debian #344 https://builds.96boards.org/snapshots/hikey/linaro/debian/344/ requires UEFI #58 https://builds.96boards.org/snapshots/hikey/linaro/uefi/58/. a) No backwards compatibility b) The OS and bootloader MUST be updated together c) MCU firmware updated d) PSCI features supported: cpuidle, cpufreq, cpu hotplug and suspend/resume e) fastboot bootloader officially deprecated (device tree requires PSCI). 2.
Debian #345 https://builds.96boards.org/snapshots/hikey/linaro/debian/345/: a) extended support for more HDMI modes b) switchable through hotkey 'Alt'+'PrtSc'+'g' c) SYSPLL reads from pctrl registers (therefore compatible with both 1.2GHz and 1.19GHz UEFI)
On 5 October 2015 at 17:35, Lee Jones lee.jones@linaro.org wrote:
Bisected to this commit:
commit af016d94f7e50ffd4ca0fe93a22cb07c06f4c4bf (HEAD, refs/bisect/bad) Author: Leo Yan leo.yan@linaro.org Date: Thu Mar 12 10:23:48 2015 +0800
arm64: dts: enable psci in hikey Enable psci in Hisilicon Hi6220 HiKey board. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi index d3428f4..e15c862 100644 --- a/arch/arm64/boot/dts/hi6220.dtsi +++ b/arch/arm64/boot/dts/hi6220.dtsi @@ -9,6 +9,11 @@ #include <dt-bindings/pinctrl/hisi.h>
/ {
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
- cpus { #address-cells = <2>; #size-cells = <0>;
@@ -17,8 +22,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>;
enable-method = "spin-table";cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clocks = <&clock_acpu HI6220_STUB_ACPU0>; clock-names = "acpu0"; clock-latency = <0>;
@@ -36,57 +40,44 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu4: cpu@4 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;
- enable-method = "psci"; clock-latency = <0>; }; cpu5: cpu@5 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu6: cpu@6 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
- enable-method = "psci"; }; cpu7: cpu@7 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>;
- enable-method = "spin-table";
cpu-release-addr = <0x0 0x740fff8>;- clock-latency = <0>;
enable-method = "psci"; };
cpu-map {
@@ -211,7 +202,6 @@ <1 14 0xff08>, <1 11 0xff08>, <1 10 0xff08>;
clock-frequency = <1200000>; };
reboot {
-- Lee Jones Linaro ST Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog _______________________________________________ Dev mailing list Dev@lists.96boards.org https://lists.96boards.org/mailman/listinfo/dev
-
Daniel Thompson -
Guodong Xu -
Lee Jones