Hi,
Has anyone successfully used JTAG on HiKey960? I have a Bus Blaster v3c adapter and OpenOCD. No luck until now.
Cheers, -- Jerome
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
For original HiKey I made the OpenOCD config file based off the t32 files, so hopefully that will help you.
Peter.
On Fri, 7 Dec 2018 at 16:47, Jerome Forissier jerome.forissier@linaro.org wrote:
Hi,
Has anyone successfully used JTAG on HiKey960? I have a Bus Blaster v3c adapter and OpenOCD. No luck until now.
Cheers,
Jerome
Dev mailing list Dev@lists.96boards.org https://lists.96boards.org/mailman/listinfo/dev
Hi Peter, On Fri, 7 Dec 2018 at 17:57, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
I am. I have copied a few settings from these files, to no avail. I must say I don't know much about JTAG so I'm prodding in the dark so to speak. At some point OCD would stop at "Info: clock ..." but now I have an "all ones" error. I will double check the continuity of the solder joints on my JTAG header before anything else.
Any idea what the following means? (section 2.7.1 JTAG Debugging in [1])
" Step 1 Power on and reset the Hi3660. Step 2 Set JTAG_SEL1 and JTAG_SEL0 to 2'b01 to multiplex the CPU JTAG function on the JTAG pin. Step 3 Set JTAG_SEL1 and JTAG_SEL0 to 2'b00 to enter the register selection mode. Configure the system control register JTAGSYS_SW_SEL [7:0] to switch to the selected debugging interface for debugging. Step 4 Connect the corresponding simulator and open the corresponding debugging software to start debugging. "
Could it be that JTAG is not connected to the CPU by default?
[1] https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey96...
Thanks,
Hi Jerome,
On Fri, 7 Dec 2018 at 17:44, Jerome Forissier jerome.forissier@linaro.org wrote:
Hi Peter, On Fri, 7 Dec 2018 at 17:57, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
I am. I have copied a few settings from these files, to no avail. I must say I don't know much about JTAG so I'm prodding in the dark so to speak. At some point OCD would stop at "Info: clock ..." but now I have an "all ones" error. I will double check the continuity of the solder joints on my JTAG header before anything else.
Any idea what the following means? (section 2.7.1 JTAG Debugging in [1])
" Step 1 Power on and reset the Hi3660. Step 2 Set JTAG_SEL1 and JTAG_SEL0 to 2'b01 to multiplex the CPU JTAG function on the JTAG pin. Step 3 Set JTAG_SEL1 and JTAG_SEL0 to 2'b00 to enter the register selection mode. Configure the system control register JTAGSYS_SW_SEL [7:0] to switch to the selected debugging interface for debugging. Step 4 Connect the corresponding simulator and open the corresponding debugging software to start debugging. "
Could it be that JTAG is not connected to the CPU by default?
It certainly sounds that way. That was also the case with HiSilicon Poplar board, by default JTAG isn't configured and you have to issue the following pokes from u-boot to configure the pinmuxing (see here https://github.com/ntfreak/openocd/commit/0e02fe40c64ad7488aeb351641723e1eb9...). I think Jorge then added that into l-loader so pin muxing was correctly configured for JTAG from very early in the bootup.
Also looking at those t32 files it seems you will need to issue more pokes once connected via JTAG to disable various watchdogs on the cores.
Pete.
[1] https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey96...
Thanks,
Jerome
For original HiKey I made the OpenOCD config file based off the t32 files, so hopefully that will help you.
Peter.
On Fri, 7 Dec 2018 at 16:47, Jerome Forissier < jerome.forissier@linaro.org> wrote:
Hi,
Has anyone successfully used JTAG on HiKey960? I have a Bus Blaster v3c adapter and OpenOCD. No luck until now.
Cheers,
Jerome
Dev mailing list Dev@lists.96boards.org https://lists.96boards.org/mailman/listinfo/dev
Hi Peter, On Mon, 10 Dec 2018 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
On Fri, 7 Dec 2018 at 17:44, Jerome Forissier jerome.forissier@linaro.org wrote:
Hi Peter, On Fri, 7 Dec 2018 at 17:57, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
I am. I have copied a few settings from these files, to no avail. I must say I don't know much about JTAG so I'm prodding in the dark so to speak. At some point OCD would stop at "Info: clock ..." but now I have an "all ones" error. I will double check the continuity of the solder joints on my JTAG header before anything else.
Any idea what the following means? (section 2.7.1 JTAG Debugging in [1])
" Step 1 Power on and reset the Hi3660. Step 2 Set JTAG_SEL1 and JTAG_SEL0 to 2'b01 to multiplex the CPU JTAG function on the JTAG pin. Step 3 Set JTAG_SEL1 and JTAG_SEL0 to 2'b00 to enter the register selection mode. Configure the system control register JTAGSYS_SW_SEL [7:0] to switch to the selected debugging interface for debugging. Step 4 Connect the corresponding simulator and open the corresponding debugging software to start debugging. "
Could it be that JTAG is not connected to the CPU by default?
It certainly sounds that way. That was also the case with HiSilicon Poplar board, by default JTAG isn't configured and you have to issue the following pokes from u-boot to configure the pinmuxing (see here https://github.com/ntfreak/openocd/commit/0e02fe40c64ad7488aeb351641723e1eb9...). I think Jorge then added that into l-loader so pin muxing was correctly configured for JTAG from very early in the bootup.
Thanks for the link. It looks like I was missing srst_push_pull. Now I have:
Open On-Chip Debugger 0.10.0+dev-00608-g68f09de (2018-12-10-14:15) [...] Info : JTAG tap: hi3660.dap tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x5)
...which looks quite promising I would say!
Cheers,
Hi Jerome,
On Mon, 10 Dec 2018 at 14:25, Jerome Forissier jerome.forissier@linaro.org wrote:
Hi Peter, On Mon, 10 Dec 2018 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
On Fri, 7 Dec 2018 at 17:44, Jerome Forissier < jerome.forissier@linaro.org> wrote:
Hi Peter, On Fri, 7 Dec 2018 at 17:57, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
I am. I have copied a few settings from these files, to no avail. I must say I don't know much about JTAG so I'm prodding in the dark so to speak. At some point OCD would stop at "Info: clock ..." but now I have an "all ones" error. I will double check the continuity of the solder joints on my JTAG header before anything else.
Any idea what the following means? (section 2.7.1 JTAG Debugging in [1])
" Step 1 Power on and reset the Hi3660. Step 2 Set JTAG_SEL1 and JTAG_SEL0 to 2'b01 to multiplex the CPU JTAG function on the JTAG pin. Step 3 Set JTAG_SEL1 and JTAG_SEL0 to 2'b00 to enter the register selection mode. Configure the system control register JTAGSYS_SW_SEL [7:0] to switch to the selected debugging interface for debugging. Step 4 Connect the corresponding simulator and open the corresponding debugging software to start debugging. "
Could it be that JTAG is not connected to the CPU by default?
It certainly sounds that way. That was also the case with HiSilicon Poplar board, by default JTAG isn't configured and you have to issue the following pokes from u-boot to configure the pinmuxing (see here https://github.com/ntfreak/openocd/commit/0e02fe40c64ad7488aeb351641723e1eb9...). I think Jorge then added that into l-loader so pin muxing was correctly configured for JTAG from very early in the bootup.
Thanks for the link. It looks like I was missing srst_push_pull. Now I have:
Open On-Chip Debugger 0.10.0+dev-00608-g68f09de (2018-12-10-14:15) [...] Info : JTAG tap: hi3660.dap tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x5)
...which looks quite promising I would say!
That is very promising :-) Hopefully you can now extend OpenOCD config to see all of the CPUs using a combination of HiKey/Poplar examples already in OpenOCD and the T32 lauterbach files.
There was another issue on HiKey where you couldn't connect to CPU 1-7 over JTAG because ATF disabled debugging in the PSCI cpu on/off code, so if you get an issue like that maybe a similar fix is required as was done for HiKey.
Pete.
Cheers,
Jerome
Also looking at those t32 files it seems you will need to issue more pokes once connected via JTAG to disable various watchdogs on the cores.
Pete.
[1] https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey96...
Thanks,
Jerome
For original HiKey I made the OpenOCD config file based off the t32 files, so hopefully that will help you.
Peter.
On Fri, 7 Dec 2018 at 16:47, Jerome Forissier < jerome.forissier@linaro.org> wrote:
Hi,
Has anyone successfully used JTAG on HiKey960? I have a Bus Blaster v3c adapter and OpenOCD. No luck until now.
Cheers,
Jerome
Dev mailing list Dev@lists.96boards.org https://lists.96boards.org/mailman/listinfo/dev
On Mon, 10 Dec 2018 at 17:54, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
On Mon, 10 Dec 2018 at 14:25, Jerome Forissier < jerome.forissier@linaro.org> wrote:
Hi Peter, On Mon, 10 Dec 2018 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
On Fri, 7 Dec 2018 at 17:44, Jerome Forissier < jerome.forissier@linaro.org> wrote:
Hi Peter, On Fri, 7 Dec 2018 at 17:57, Peter Griffin peter.griffin@linaro.org wrote:
Hi Jerome,
Are you aware of the Lauterbach T32 configs here https://github.com/96boards-hikey/tools-images-hikey960/blob/master/trace32-... ?
I am. I have copied a few settings from these files, to no avail. I must say I don't know much about JTAG so I'm prodding in the dark so to speak. At some point OCD would stop at "Info: clock ..." but now I have an "all ones" error. I will double check the continuity of the solder joints on my JTAG header before anything else.
Any idea what the following means? (section 2.7.1 JTAG Debugging in [1])
" Step 1 Power on and reset the Hi3660. Step 2 Set JTAG_SEL1 and JTAG_SEL0 to 2'b01 to multiplex the CPU JTAG function on the JTAG pin. Step 3 Set JTAG_SEL1 and JTAG_SEL0 to 2'b00 to enter the register selection mode. Configure the system control register JTAGSYS_SW_SEL [7:0] to switch to the selected debugging interface for debugging. Step 4 Connect the corresponding simulator and open the corresponding debugging software to start debugging. "
Could it be that JTAG is not connected to the CPU by default?
It certainly sounds that way. That was also the case with HiSilicon Poplar board, by default JTAG isn't configured and you have to issue the following pokes from u-boot to configure the pinmuxing (see here https://github.com/ntfreak/openocd/commit/0e02fe40c64ad7488aeb351641723e1eb9...). I think Jorge then added that into l-loader so pin muxing was correctly configured for JTAG from very early in the bootup.
Thanks for the link. It looks like I was missing srst_push_pull. Now I have:
Open On-Chip Debugger 0.10.0+dev-00608-g68f09de (2018-12-10-14:15) [...] Info : JTAG tap: hi3660.dap tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x5)
...which looks quite promising I would say!
That is very promising :-) Hopefully you can now extend OpenOCD config to see all of the CPUs using a combination of HiKey/Poplar examples already in OpenOCD and the T32 lauterbach files.
I am making good progress...
$ telnet localhost 4444 Trying 127.0.0.1... Connected to localhost. Escape character is '^]'. Open On-Chip Debugger
targets
TargetName Type Endian TapName State -- ------------------ ---------- ------ ------------------ ------------ 0* hi3660.cpu0 aarch64 little hi3660.tap running 1 hi3660.cpu1 aarch64 little hi3660.tap running 2 hi3660.cpu2 aarch64 little hi3660.tap running 3 hi3660.cpu3 aarch64 little hi3660.tap running 4 hi3660.cpu4 aarch64 little hi3660.tap running 5 hi3660.cpu5 aarch64 little hi3660.tap running 6 hi3660.cpu6 aarch64 little hi3660.tap running 7 hi3660.cpu7 aarch64 little hi3660.tap running
:-)
I occasionally get "Error: JTAG-DP STICKY ERROR", quite often actually. But the OpenOCD console (telnet) seems to be quite usable. I can halt/resume the CPUs and examine the registers, which is just what I wanted to do in the first place. I have not tried GDB yet.
There was another issue on HiKey where you couldn't connect to CPU 1-7 over JTAG because ATF disabled debugging in the PSCI cpu on/off code, so if you get an issue like that maybe a similar fix is required as was done for HiKey.
I did not need to change anything there. Disabling cpuidle was necessary however: # for f in /sys/devices/system/cpu/cpu*/cpuidle/state*/disable; do echo 1
$f; done
I will share/upstream my OpenOCD config file when I'm confident it works OK.
Thanks for your support!
-
Jerome Forissier -
Peter Griffin