Comments/observations inline below .. hope this is helpful.
Firstly, in the config file, hi6220.cpu is created with "target create". Eg., target create $TARGETNAME aarch64 ... The TARGETNAME variable is set earlier and probably with the value "hi6220.cpu". The target command creates the TCL binding for the target name.
Note that the target binding is to aarch64, not cortex. From there things get more complicated and messy.
If the core is in aarch32 mode then mcr/mrc can be used for coprocessor access. If in aarch64 mode then use mrs and msr (I don't see mcr/mrc offhand in aarch64 instruction encoding).
best regards, -Phil
On 11/2/2015 1:19 AM, Haojian Zhuang wrote:
On 1 November 2015 at 12:05, Philip Attfield email@example.com wrote:
The commands are buried in the help output that you provided.
Please try any of: hi6220.cpu arm mcr cpnum op1 CRn CRm op2 value write coprocessor register hi6220.cpu arm mrc cpnum op1 CRn CRm op2 read coprocessor register hi6220.cpu arm mrs op0 op1 CRn CRm op2 read system register hi6220.cpu arm msr op0 op1 CRn CRm op2 value write system register
Those are the mcr/mrc/mrs/msr instruction execution functions. They should route through to the ARMV8 implementation.
Now the ARMv8 implementation of mrs/msr/mcr/mrc is empty. So it has to go through ARMv4 implementation. And it couldn't dump anything at last.
By the way, "hi6220.cpu arm" commands are equal to "arm" commands. There are no difference between these two commands. Could you help me to figure out how the "hi6220.cpu" command is created?
OpenOCD "sort of" implements classes and inheritance .. at least to the extent that this can be done in C.
The implementations of the V8 mcr/mrc/msr/mrs functions are in armv8_dpm.c. At target initialization, the methods in the V8 DPM (debug port) are setup via armv8_dpm_setup(). This populates the mcr/mrc/msr/mrs handler functions into a "struct arm". The definition for mcr/mrc comes from V4_5 macros while msr/mrs the implementation is V8. The function armv8_dpm_setup() is called through target setup for aarch64.
aarch64 derives from arm and v4_5 but initializes/overrides implementation/method functions. When "hi6220.cpu arm" is invoked, this will locate the target, which is aarch64 and call through to the target methods. In this case, they should be the V8 DPM functions.
The encoding for aarch32 is the same as V7, if I read the ARM TRM instruction encoding correctly.
In V8/aarch64 mode encoding, do MCR/MRC exist - I don't see them in the programmers model ? When in aarch64 mode, MRS and MSR for armv8_dpm should be called. For V8/aarch32, ARM wanted binary compatibility. Calling the V4_5 macros should be correct (the instruction encodings for V8/aarch32 mode and V7 for mrc and mcr are the same, unless I am mis-reading the datasheets).
If you need to dump a set of CP registers then this should be possible via a TCL function that you could write as part of the ".cfg" file. If the core-name (hi6220.cpu) is passed as a parameter then the function will work in SMP scenario as well.
best regards, -Phil